1. Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of forming source/drain buried contact junctions in the fabrication of integrated circuits.
2. Description of the Prior Art
In forming buried contact regions, a wider and deeper junction is allowable for a contact, but is not acceptable for a high quality source/drain region in integrated circuits designed in the less than one micron era.
A typical buried contact process flow is to deposit a doped layer of polysilicon over and on the planned source/drain regions. The structure is heated and the source/drain regions are formed by outdiffusion from the doped polysilicon layer. The doped polysilicon layer is allowed to remain on the source/drain regions as their contacts. This is called the buried contact process.
A number of workers have addressed this and other problems involving forming source/drain regions. U.S. Pat. No. 5,049,514 to Mori shows a process of doping polysilicon, open metal silicide layer, ion implanting, and annealing to form the source/drain region. U.S. Pat. No. 5,030,584 to H. Nakata describes a process involving outdiffusion to form source/drain regions and to leave the contact and source of dopants for the source/drain regions in place. While this patent's invention has the advantage of self alignment of the contact to the source/drain, it does not have the desired tailoring of the source/drain regions to the optimum conditions for the under one micron era.